Arteris IP’s Stefano Lorenzini to Speak at Automotive IQ Application of ISO 26262 Berlin Conference

Eugenie Bramley, 2022年04月25日

CAMPBELL, Calif. – April 25, 2022 – Arteris IP (NASDAQ: AIP), a leading provider of system IP consisting of network-on-chip (NoC) interconnect and IP deployment software that accelerate system-on-chip (SoC) creation, today announced that Functional Safety Manager Stefano Lorenzini will present at the Automotive IQ Application of ISO 26262 Conference on Wednesday, April 27, 2022, at Hilton Berlin, Germany. His keynote presentation, Automating the Generation of Scalable and Reusable FMEDA in Complex Systems-on-Chip, begins at 11:15 (CEST).

Mr. Lorenzini has more than 25 years of safe and secure SoC design and architectures experience spanning Arteris IP, Alcatel Microelectronics, Cadence Design Systems, Ericsson, Intel, ST Microelectronics, and Yogitech. He has spent the last 18 years managing SoC functional safety applications regulated by IEC 61508 and ISO 26262 standards.

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About Arteris IP

Arteris IP (NASDAQ: AIP) provides system IP consisting of network-on-chip (NoC) interconnect IP and IP deployment technology to accelerate system-on-chip (SoC) semiconductor development and integration for a wide range of applications from AI to automobiles, mobile phones, IoT, cameras, SSD controllers and servers for customers such as BoschBaiduMobileyeSamsungToshiba and NXP. Arteris IP products include the Ncore® cache coherent interconnect IP and FlexNoC® non-coherent interconnect IP, the CodaCache® standalone last level cache, and optional Resilience Package (ISO 26262 functional safety)FlexNoC AI Package, and PIANO® automated timing closure capabilities. Our IP deployment products provide intelligent automation that accelerates the development and increases the quality of SoC hardware designs and their associated software and firmware, verification and simulation platforms, and specifications and customer documentation. Customer results obtained by using Arteris IP products include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. For more information, visit stage.arteris.com or find us on LinkedIn at https://www.linkedin.com/company/arteris.

Arteris, Arteris IP, FlexNoC, Ncore, CodaCache, PIANO, Magillem and the Arteris IP logo are registered trademarks of Arteris, Inc. and/or its applicable subsidiaries.  Arteris Harmony and Arteris Harmony Trace are trademarks of Arteris, Inc. All other product or service names are the property of their respective owners. 

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