Blog

Learn about the inspiring career journey of Charles Janac. Discover his advice for early-career engineers and his passion for technology....

The growing complexity of integrating multiple processing elements, memory systems and communication interfaces into a single SoC demands innovative solutions to optimize power efficiency. Arteris offers a comprehensive suite of IP products...

A new trend is emerging in the design of high-end, multi-billion-transistor system-on-chip (SoC) devices and it is called “NoC tiling”. It’s an innovative approach that facilitates scaling, condenses design time, speeds testing, and r...

At a time when artificial intelligence (AI)-centric system-on-chips (SoCs) are growing in size and complexity, network-on-chip (NoC) tiling hand in hand with mesh topology can support faster development of compute chip designs....

Integrating cache memory into SoCs and IP blocks improves their performance and efficiency. This article highlights technologies and strategies to address challenges like cache coherency and power consumption....

An emphasis on physical awareness significantly reduces the iterative cycles of NoC placement and routing....