Design News: Network On-Chip IP Speeds SoC Development

Spencer Chin, Senior Editor for Design News, authored this Design News Article on Arteris’ FlexNoC 5.

As with other designs, engineers looking to create system-on-chips are seeking to accelerate the design process. Arteris, Inc., a provider of system IP, has launched its Arteris FlexNoC 5 physically aware network-on-chip (NoC) interconnect IP. FlexNoC 5 enables SoC architecture teams, logic designers and integrators to incorporate physical constraint management across power, performance and area (PPA) to deliver a physically aware IP connecting the SoC.

To read the full article on DesignNews, click here.