Blog Home Blog Search: Date How to Calculate Late Time to Market (TTM) Revenue Loss, Part 1 When I speak to semiconductor product managers, directors and VPs, one of the questions I often ask is, “How much does it cost you if your chip is one month late?” ... 2011年06月22日 阅读全文 IP Subsystems Are Nothing New As featured in: I’ve been hearing the term “IP subsystem” lately, and it seems to be the latest newfangled buzz word in the SoC semiconductor and IP industry, second only to “virtualization.” Much of the context for this growi... 2011年04月28日 阅读全文 AMBA AXI and OCP: Behind the Standards As featured in: As engineers, we view transaction protocols as simply a language to be able to communicate information from one block of system-on-chip (SoC) IP to another block. However, if you look at transaction protocols from an eco... 2011年04月04日 阅读全文 NoC is not a Noun Today in the IP and EDA business, I hear “knock” all the time, except people mean “NoC.” It seems everybody wants a NoC, or wants to offer you a NoC. I’m here to tell you that NoC is not a noun.... 2011年03月14日 阅读全文 TI OMAP 5 Platform includes MIPI LLI and C2C interchip connectivity TI has placed extensive information on their new OMAP5430 and OMAP5432 processors on their web page.... 2011年03月04日 阅读全文 The 3 Evils of Routing Congestion The 3 evils of wire routing congestion are poor performance, longer schedules, and lower yields... 2011年02月05日 阅读全文 « Previous Page 1 … 57 58 59 60 Next Page » Arteris Articles News and original writing about on-chip interconnects, on-chip communications and the semiconductor intellectual property industry. Subscribe to Arteris News