TI OMAP 5 Platform includes MIPI LLI and C2C interchip connectivity

Of note is their inclusion of two additional means to connect phone modems and other companion chips to the OMAP SoC platform:  C2C and MIPI LLI.

MIPI LLI

The MIPI Low Latency Interface (LLI) is being created to produce a specification for an interface to allow low enough latency for  DRAM memory sharing between two chips. In addition, LLI is fast enough to allow two chips to appear as one to software.

LLI requires a PHY and either 2 or 4 pins. Read more about it here:  http://www.mipi.org/working-groups/low-latency-interface

C2C

C2C and Chip to Chip Link are TI trademarks. The product was jointly developed by Arteris and TI. The connection also allows DRAM memory sharing between two chips but does not use a PHY. However, it requires more pins than MIPI LLI.

Saving eBOM Cost

Both C2C and LLI save mobile phone vendors money. By allowing a mobile phone modem (or any other chip) to share the OMAP processor’s DRAM, the phone or tablet vendor does not need to pay $2 for the modem’s own DRAM. A $2 per unit bill of materials savings for a mobile phone is HUGE.

What is most interesting is how these interchip connectivity technologies can be used to create modular chip platforms where designers can add or change features by changing a chip, but keeping the same software.

For example, imagine a mobile phone modem vendor who wants to get to market first with the latest mobile phone standard: Instead of creating the modem from scratch, the modem vendor could create a companion chip to the existing modem that adds support for the new phone standard. These interchip connectivity methods sound perfect for keeping up with the latest flavors of LTE.