Customers

We chose the Arteris Ncore cache coherent interconnect because of its unique proxy caches and their ability to underpin high-performance, low power, cache coherent clusters of our unique AI accelerators. And with our prior experience using FlexNoC and the FlexNoC FuSa Option for functional safety, we trust Arteris to be the highest performing and safest choice for ISO 26262-compliant NoC IP.

Using Arteris FlexNoC allows us to reduce development time and manage project risk. FlexNoC’s advanced quality-of-service and debugging features, combined with its multi-protocol support, allow Samsung SUHD TVs to reduce power consumption and die area for complex chips with more than 100 IP interfaces.

We are happy to share that we are partnering with Arteris to use Ncore and FlexNoC IP in our next-generation product. The combination of performance and features made it a great choice for both our AI chips and our high-performance RISC-V CPUs. The Arteris team and IP solved our on-chip network problems so we can focus on building our next-generation AI and RISC-V CPU products.

We are excited to partner with Arteris to accelerate the creation and delivery of an advanced communication SoC. Now, we can focus our resources where we bring the most value. Our company will leverage Arteris’ proven Ncore and FlexNoC technology and interconnect expertise for a combination that allows us to provide our customers with the best products in the shortest amount of time.

We are redefining the deployment of inference at the edge with our highly efficient technology. These designs are highly complex, and the hardware and software interfaces are critical to performance and core functionality. Arteris CSRCompiler ensures the hardware and software interfaces function as expected, and that both the hardware and software teams can test interaction during chip development.

We have used other CSR EDA tools over the years, but Arteris’s CSRCompiler offers the fullest featured and most flexible tools as well as easiest to use. It eliminates all confusion around CSR.

We have worked with Arteris NoC technology since 2010, and are excited that Arteris has brought its significant engineering prowess to help solve the problems of fault tolerant and reliable SoC design.

Arteris is the proven industry standard for system IP with responsive support, and deploying their technology guaranteed we met our performance requirements and aggressive timelines, Arteris FlexWay interconnect IP allowed us to close timing smoothly on a complex, multicore machine learning architecture. We look forward to working together on the next project.

Sondrel has deployed Arteris FlexNoC interconnect IP across several customer SoC projects to great effect. Physical constraints have always been an important issue and are even more important below 16nm geometries. The latest FlexNoC 5 with its physical awareness technology, enables our RTL teams to verify that architectures meet physical constraints and provide a better starting point for our place and route team. We look forward to our continued cooperation with Arteris.

Altera SoC FPGAs are architected to ensure customers have a solid foundation upon which to build their embedded systems, and using Arteris’ network-on-chip IP has helped us create a superior SoC FPGA. The Arteris FlexNoC Resilience IP will make it easier for Altera to implement more dependable SoC FPGAs for fault tolerant systems in the future.

Arteris FlexNoC interconnect IP is the only interconnect that would allow our AI chips to achieve their high bandwidth requirements while also meeting our QoS requirements. Using Arteris NoC technology allows our architecture to take maximum advantage of state-of-the-art HBM2 memories to avoid system-level data starvation, which is major problem with less efficient AI training chips.

Reliable and fast design capture: tedious tasks are hidden for the SoC integrator.

Arteris FlexNoC fabric IP has been our choice for SoC development since 2008. The data protection and redundancy features included in the FlexNoC Resilience Package will help us design and implement our fault tolerant SoCs faster and at a higher quality level than possible before.

From our experience with Arteris’ NoC technology over the years, we knew that Arteris FlexNoC IP was the fastest interconnect fabric for SoCs with multiple initiator and target IP blocks. However, we were surprised that FlexNoC could continue to run at fast design frequencies with a significantly lower gate count and less power consumption than alternative bus fabrics.

Arteris’ network-on-chip interconnect IP allows us to reduce the die size of Mobileye's 3rd generation vision processor, EyeQ3, optimize latency for critical IP blocks and reach timing closure much sooner than expected.

FlexNoC interconnect IP allowed us to dramatically increase MCU performance and functionality with no impact on die area while significantly decreasing power consumption.

The Arteris CodaCache reduces memory bottlenecks and saves power by allowing system-on-chip to employ a highly configurable last-level cache rather than solely communicating with off-chip memory. Designers will be attracted to the variety of use cases that CodaCache IP supports, including dedicated, shared, and distributed partitioning, as well as its use as on-chip scratchpad storage.

With Arteris, our customers can be assured of responsiveness and reliability to help reduce collisions and make roads safer.

By incorporating Arteris FlexNoC interconnect IP into our development programs, we are able to streamline our overall design time. This solution also provides us with flexibility to create derivations of our offerings to quickly adapt to changing market needs.

Arteris FlexNoC gives Hisense the flexibility to quickly integrate the latest hardware and software features into our SoC platforms, allowing us to bring our products to market quicker than the competition.

Arteris’ integrated interconnect configuration tool suite made it easy for us to quickly iterate through different topology and QoS options. Our engineers are very productive using the Arteris tools. We can now quickly find the root cause for timing issues by reviewing the Arteris FlexExplorer simulation results, then determine whether we want to add a pipeline or register slice at a specific location in the interconnect, change the topology, or change QoS or protocol parameters.

As a result of our thorough evaluation, we know the Arteris FlexNoC interconnect IP will help us shorten development schedules and increase product performance, while simultaneously decreasing costs due to back-end wire routing congestion and timing closure issues.

Our successful adoption of Arteris FlexNoC fabric IP has been straightforward, allowing us to more quickly architect and implement sophisticated systems-on-chip in less time and with better power consumption and performance.

Finding the root cause of timing issues, determining the solution, then implementing it used to take days and sometimes weeks. We are now able to solve these issues in hours. This huge reduction in troubleshooting and problem resolution time frees us up to work on other aspects of the SoC.

Our customers require the latest, most advanced technology and the Arteris FlexNoC interconnect IP is a necessary addition to our portfolio. Acquiring the FlexNoC license strengthens our technology platform and design services offerings, and provides our customers with more options to future-proof their solutions.

The Arteris interconnect IP offers us a convenient solution to handle the high speed communication needed between our SoC and external modem IC. Our customers will benefit from the lower BOM cost and power consumption as a result of this IP. We look forward to Arteris’ interconnect IP helping us shorten development schedules and lower risks associated with compatibility.

Using the built-in FlexExplorer simulation capabilities, we were able to try many candidate architectures and configurations in very short turn-around-times. This enabled us to quickly optimize our SoC by implementing FlexNoC’s many advanced features. We were able to meet all functional, performance, area and frequency requirements without suffering any backend layout or timing issues. Using FlexNoC IP was key to our team’s success.

We exhaustively benchmarked the Arteris NoC interconnect IP against the competition. We need real-time performance with extremely low latency between video IP blocks, and we found the Arteris NoC to be the best solution for EyeQ3. Furthermore, we found Arteris’ memory scheduler to be superior, with excellent Quality of Service in a smaller die area. With Arteris, our customers can be assured of responsiveness and reliability to help reduce collisions and make roads safer.

TSMC chose to work with Arteris on the interposer based test chip program because its interconnect technology is ideally suited to addressing the SoC wire routing congestion and timing closure challenges. TSMC and Arteris are working together to make it easier for our joint customers to adopt these technologies.

Using Arteris helped Sckipio to be the first to market with G.fast products. We chose FlexNoC fabric IP because we wanted to be the first to provide built-in, high performance vectoring across a large number of high bandwidth lines while maintaining low latency.

A growing number (of OEMs and system suppliers) are turning to safety- and security-optimized network-on-chip subsystems for SoCs, such as the FlexNoC Resilience Package, to lower the development costs and the time it takes to achieve the ISO 26262 certification, enabling both media-intense processing and certifiable mission critical solutions in an integrated SoC.

After our investigation, we saw that Arteris FlexNoC was the best SoC fabric technology that would provide dual channel memory support and address high speed routing congestion issues.

Our evaluation of Arteris FlexNoC was extremely quick, and received very positive results in routing and timing closure. Using FlexNoC creates unique time and cost advantages for us and our customers.

Arteris FlexNoC provides an advantage in improving system efficiency and shortening the development cycle of smartphone SoCs.

Arteris NoC technology enables wide on-chip bandwidth with fewer wires and lower latency than traditional bus and crossbar fabrics. This multiuse deal is expected to help us deliver these benefits more quickly to engineering teams throughout Freescale.

Arteris continues to advance network-on-chip technology with the FlexNoC Composition feature. FlexNoC Composition should enable design teams to dramatically improve SoC design partitioning - speeding development time and increasing parallel subsystems.

The Arteris FlexNoC technology helps us get the most out of our design and development phase. FlexNoC fabric IP speeds our time to market – and lets us make mission-critical changes at the very end of the design process. This reduced risk gives us confidence that our products will be right every time.

We rely upon FlexNoC’s integrated probing and observability features to make defect-free SoCs. And with FlexNoC’s integrated IP and tool suite, we can show our customers that their use cases are satisfied and offer them earlier software validation because of FlexNoC’s embedded debugging and probing features.

Arteris and their team of engineers delivered a product that exceeded our expectations. Our previous experience with commercial fabric IP involved numerous defects so we were extremely pleased with Arteris’ NoC technology, level of support and product quality.

The fruits of this YOGITECH and Arteris partnership will help the automotive and semiconductor industries to more quickly implement in silicon the complex features required for autonomous driving systems

After conducting internal benchmark testing between Arteris and other solutions, we proved that FlexNoC delivered improved performance with reduced power consumption. In addition, the design flexibility and shortened development time made Arteris the clear winner for our LTE platform.

IC-LOGIC chose FlexNoC and C2C to create a flexible and high speed communication chip to respond to the increasing demand of high speed connectivity in car infotainment systems. This is yet another ‘first time right’ device by IC-LOGIC’s industry leading team of automotive and industrial semiconductor designers that establishes a new speed record for design to production, delivering a field-hardened chip that will withstand our customers’ rigorous demands.

We automatically generated 2 Million lines of register header files for just one chip! And we automated much of our Linux device tree and low-level firmware development.

Our extensive use of Arteris FlexNoC interconnect IP has enabled us to increase the number of complex SoC designs we can implement in a year, with the same amount of resources. We are always looking for ways to differentiate our product portfolio, and our collaboration with Arteris is a key factor in enabling us to be both technology and time-to-market leaders with advanced designs.

The Arteris FlexNoC commercial SoC interconnect fabric IP gives us the performance required by our customers. We have seen first-hand how the interconnect IP improves process flow and overall system performance.

CSR's platform SoC solutions enable its customers to deliver a superior and differentiated user experience. With the Arteris FlexNoC interconnect IP, we have confidence that our designers will achieve improved performance and design flexibility for our Automotive and Imaging SoC products.

Arteris is staking its claim as one of the companies helping leaders to improve upon their success in bringing market dominating application processors and LTE modems into popular systems and devices.

After a complete evaluation of available interconnect fabric IP products, Arteris FlexNoC was the clear choice. FlexNoC is the only SoC fabric that allows us to meet tight timing margins and achieve design frequency requirements. We are pleased with the increased productivity our design team has experienced using FlexNoC.

FlexNoC’s power management features and low latency helped us create the lowest-power IoT communication devices in the world. Just as important were the business benefits: Using FlexNoC allowed us to create a small set of digital logic SoC dies that serve as the brains of more than one hundred different products, each customized for its particular market.

Arteris has provided exceptional support to our teams, giving us the confidence to implement the FlexNoC solution in our critical Smartphone SoC platform.

The Arteris FlexNoC commercial SoC interconnect fabric IP meets the performance metrics established by our mobile phone customers. These results gave us the confidence to implement the solution in our critical Smartphone SoC platform. We have very high expectations and feel confident that Arteris will meet our needs.

Arteris exceeded our expectations on the previous multi-core SoC platform, delivering exceptional performance and design efficiency. Arteris FlexNoC interconnect IP enables us to exceed our design frequency and power requirements while giving us more flexibility than possible using older interconnect technologies, like buses and crossbars.

Arteris FlexNoC’s development efficiency benefits give us an advantage over our competitors because we can get our product to market sooner with more features and at a higher quality level.

FlexNoC’s flexibility and automation, combined with our implementation of software-programmable on-chip firewalls and power disconnect features, enabled us to produce an entire product line with a minimal number of digital logic components.

Implementing functional safety features in silicon offers many advantages over software-only approaches by enabling less complexity, pre-characterized quality and more semiconductor vendor control over the system-wide functional safety feature implementations.