FlexNoC 5 互联 IP

Sondrel has deployed Arteris FlexNoC interconnect IP across several customer SoC projects to great effect. Physical constraints have always been an important issue and are even more important below 16nm geometries. The latest FlexNoC 5 with its physical awareness technology, enables our RTL teams to verify that architectures meet physical constraints and provide a better starting point for our place and route team. We look forward to our continued cooperation with Arteris.

Using Arteris FlexNoC allows us to reduce development time and manage project risk. FlexNoC’s advanced quality-of-service and debugging features, combined with its multi-protocol support, allow Samsung SUHD TVs to reduce power consumption and die area for complex chips with more than 100 IP interfaces.

FlexNoC interconnect IP allowed us to dramatically increase MCU performance and functionality with no impact on die area while significantly decreasing power consumption.

As a result of our thorough evaluation, we know the Arteris FlexNoC interconnect IP will help us shorten development schedules and increase product performance, while simultaneously decreasing costs due to back-end wire routing congestion and timing closure issues.

By incorporating Arteris FlexNoC interconnect IP into our development programs, we are able to streamline our overall design time. This solution also provides us with flexibility to create derivations of our offerings to quickly adapt to changing market needs.

TSMC chose to work with Arteris on the interposer based test chip program because its interconnect technology is ideally suited to addressing the SoC wire routing congestion and timing closure challenges. TSMC and Arteris are working together to make it easier for our joint customers to adopt these technologies.

Our successful adoption of Arteris FlexNoC fabric IP has been straightforward, allowing us to more quickly architect and implement sophisticated systems-on-chip in less time and with better power consumption and performance.