ChipEstimate: Accelerating Time to Market with an IP-XACT-based First-Time-Right SoC Integration Process
Managing SoC integration is complex. Integrating content from various sources often results in problems deep in the product development cycle. Get it right the first time with automation.
SemiWiki: Arteris Frames Network-On-Chip Topologies in the Car
Arteris and Arm announced an update to their partnership. This prompts the question: where are coherent and non-coherent NoCs in automotive systems? Let’s find out.
Semiconductor Engineering: Cache Coherency In Heterogeneous Systems
Why maintaining flexibility in coherency is essential in heterogeneous designs. A video discussion with Semiconductor Engineering’s Ed Sperling.
Design News: Ncore’s Not Your Granny’s Coherent NoC (Network-on-Chip)
Designing a NoC is hard enough on a good day. It’s significantly more difficult to develop a coherent NoC. This is why design teams need to use NoC IP.
EDN: The role of cache in AI processor design
The advantages of cache go beyond processor clusters and are equally applicable to many other complex IPs including AI accelerators.
SemiWiki Podcast: The Impact of Arteris on Automotive and Beyond with Frank Schirrmeister
Dan Nenni of SemiWiki is joined by Arteris’ Frank Schirrmeister in a conversation on automotive and the impact of network-on-chip IP on system design.
Connected by Arteris: The Importance of Ecosystem Cooperation for Interoperability
Discover how the Arm Arteris collaboration accelerates automotive electronics development cycles, ensuring safety, performance and trusted interoperability.
Design & Reuse: Arm and Arteris Drive Innovation in Automotive SoCs
In the same way that Arm leads in providing the processor portion of automotive SoCs, Arteris is the NoC interconnect leader. Together, it’s a powerful solution.
SemiWiki: Arteris is Unleashing Innovation by Breaking Down the Memory Wall
There is a dramatic difference between processor and memory performance. Ncore can reduce the overhead for implementing cache coherent architectures, breaking down the memory wall.
Connected by Arteris: Navigating Integration Challenges for the RISC-V Ecosystem with Networks-on-Chips (NoCs)
Unlock RISC-V’s potential with Arteris’ NoC solutions, optimizing SoC integration, chiplet readiness, power, performance, and innovation flexibility.