EE Times just published a new article I wrote about how the automotive industry has replaced the mobile phone industry as the driver for new semiconductor technologies.

Arteris’ Ncore Cache Coherent Interconnect IP was featured in a Linley Group white paper titled, “Easing Heterogeneous Cache Coherent SoC Design using Arteris’ Ncore Interconnect.”

Junko Yoshida wrote a great article in EE Times titled, “Driverless Car on Same Road as 3D TV?“, about the technology gold rush that is automotive electronics. She was prescient about the limitations of current technology and business models, and

SemiEngineering published an article I wrote this week about how the USDOT Smart City Challenge Smart City Challenge will help accelerate automotive semiconductor innovation.

Arteris’ new Ncore Cache Coherent Interconnect IP was featured in a Microprocessor Report article.

EE Times has published a story about Arteris and the path we took to build the world’s best cache coherent interconnect IP team and and develop the Ncore cache coherent interconnect IP product. The writer is EE Times Contributing Editor

Synopsys announced their new cache coherent subsystem verification solution which integrates with Arteris Ncore: Synopsys Delivers Industry’s First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect.

Arteris Ncore has been featured in a detailed article in AnandTech by Andrei Frumusanu titled, “Arteris Announces Ncore Cache-Coherent Interconnect.”

Here’s a good article by Ann Steffora Mutschler that describes some of the issues of implementing hardware cache coherency using cache coherent interconnects. Neil Parris from ARM is quoted, as am I.

SemiEngineering has published a Tech Talk video I did with editor Ed Sperling about the ISO 26262 standard and advanced driver assistance systems (ADAS).