Contact Us
Generic selectors
Exact matches only
Search in title
Search in content
Post Type Selectors

Resources Search

Resources Search

background-element-24

Sort & Filter

Type
Resources catergories filter
Resources Type Filter
AI / Machine Learning (9) RISC-V Designs (7) Cybersecurity (6) Hardware Security Assurance (5) ISO 26262 (4) Network-on-Chip IP (4) Traceability (4) FMEDA (3) Functional Safety (3) IP-XACT (3) Magillem Connectivity (3) Multi-Die (3) Network-on-Chip (NoC) (3) FlexGen (2) FlexNoC (2) Magillem Registers (2) Power Consumption (2) Radix-S/M/ST (2) Automotive (1) CodaCache (1) Hardware/Software Interface (HSI) (1) Magillem Packaging (1) Ncore (1) Power Management (1) Routing Congestion (1) SystemC (1)
Year filter
Show More
Latest
Oldest
A-Z
Z-A
Filter by Product
Filter by Solution
22 Results
Sort & Filter
Podcast

SemiWiki: The Impact of Using a Physically Aware NoC with Charlie Janac

Arteris CEO joins SemiWiki’s Daniel Nenni on Semiconductor Insiders Podcast to discuss the impact of using a physically aware NoC.
Presentation

Tiled Approach to System Scaling

Today’s large-scale SoCs such as AI accelerators often deploy regular repeating arrays of processor elements. See how tiling accelerates physical design by enabling re-use of hardened physical blocks in addition to logical elements.
Previous
Next Page

No results found

Make sure all words are spelled correctly. Try different, more general, or fewer keywords.

Call to Action
Popup Overlay