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AI / Machine Learning (9) RISC-V Designs (7) Cybersecurity (6) Hardware Security Assurance (5) ISO 26262 (4) Network-on-Chip IP (4) Traceability (4) FMEDA (3) Functional Safety (3) IP-XACT (3) Magillem Connectivity (3) Multi-Die (3) Network-on-Chip (NoC) (3) FlexGen (2) FlexNoC (2) Magillem Registers (2) Power Consumption (2) Radix-S/M/ST (2) Automotive (1) CodaCache (1) Hardware/Software Interface (HSI) (1) Magillem Packaging (1) Ncore (1) Power Management (1) Routing Congestion (1) SystemC (1)
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Smart NoC IP - Revolutionizing SoC Design
Video

Revolutionizing Semiconductor Design with Smart NoC IP

Learn how FlexGen Smart NoC IP can optimize and advance your semiconductor design processes. Designed for automotive, data centers, and industrial electronics applications, it enables faster time-to-market and/or multiple design explorations for the most complex systems.
Podcast

EE Times: Automating NoC Design Masters SoC Complexity

In this podcast, Sally Ward-Foxton and Michal Siwinski discuss how FlexGen, smart NoC IP, is revolutionizing NoC design through automation and why this is crucial for today’s chips. How it addresses the growing demands of AI, and what the future holds for NoC technology.
FlexGen Product Tour image
Video

FlexGen Product Tour

Watch an overview showing how FlexGen smart NoC IP generates a network-on-chip for your SoC in minutes. The RTL is correct-by-design, wire length optimized to meet all the specified performance requirements and floorplan constraints of your design.
SemiEngineering Whiteboard Integration Challenges For RISC-V Designs
Video

Integration Challenges for RISC-V Designs

Modifying the source code allows for democratization of design, but it adds some hurdles for design teams.
SemiEngineering Whiteboard: Promises and Pitfalls of SoC Restructuring
Video

Promises and Pitfalls of SoC Restructuring

Learn about sidestepping data incompatibility issues in heterogeneous chip designs.
Scaling Performance In AI Systems
Video

Scaling Performance in AI Systems

AI designs face increasing challenges in balancing power, performance, and data throughput. Andy Nightingale from Arteris discusses how network-on-chip technology can help alleviate these bottlenecks and accelerate chip time-to-market.
Power Dissipation of the Network-on-Chip in a System-on-Chip for MPEG-4 Video Encoding
White Paper

Power Dissipation of the Network-on-Chip in a System-on-Chip for MPEG-4 Video Encoding

An oldie but a goodie: Explains power benefits of NoC technology by characterizing a multi-processor system-on-chip (MPSoC) for MPEG4, AVC/H.264 encoding. Explains NoC power model used to analyze power consumption and dissipation.
Scalability A Looming Problem in Safety Analysis
White Paper

Scalability – A Looming Problem in Safety Analysis

Misbehavior in the electronics can lead to accidents, even fatalities. This paper describes how ISO 26262 standard and in particular the Failure Modes, Effects and Diagnostic Analysis (FMEDA) can be leveraged to address this real concern.
Security in Artificial Intelligence (1)
White Paper

Security in Artificial Intelligence

Unlock insights into AI security challenges & protection strategies. Dive deep into the dual role of AI in cybersecurity.
Presentation

Automating the Generation of Scalable and Reusable FMEDA in Complex Systems-on-Chip (SoCs)

Presented at IQPC Application of ISO 26262 2022 Conference, describes an approach that uses a hierarchal and modular library of safety components to describe failure modes, safety mechanism diagnostic coverage, and other functional safety metrics at a level that scales with the size and complexity of an SoC and enables reuse for the creation of SoC platform derivative chips, which is common in our industry.
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