Resources Search
Sort & Filter
Type
Topics
Year
Show More
Sort
Latest
Oldest
A-Z
Z-A
21 Results
Sort & Filter
White Paper
AMS System-Level Verification and Validation using UVM in SystemC and SystemC-AMS: Automotive Use Cases
This 12-page paper published in the peer-reviewed IEEE Design & Test journal explains how Universal Verification Methodology (UVM), initially developed for digital systems, can be extended to analog and mixed signal systems with the help if IP-XACT-based IP packaging and design flow automation.
White Paper
Scalability – A Looming Problem in Safety Analysis
Misbehavior in the electronics can lead to accidents, even fatalities. This paper describes how ISO 26262 standard and in particular the Failure Modes, Effects and Diagnostic Analysis (FMEDA) can be leveraged to address this real concern.
Presentation
Automating the Generation of Scalable and Reusable FMEDA in Complex Systems-on-Chip (SoCs)
Presented at IQPC Application of ISO 26262 2022 Conference, describes an approach that uses a hierarchal and modular library of safety components to describe failure modes, safety mechanism diagnostic coverage, and other functional safety metrics at a level that scales with the size and complexity of an SoC and enables reuse for the creation of SoC platform derivative chips, which is common in our industry.
Presentation
Building Better IP with RTL Architect NoC IP Physical Exploration
Voted one of the “Top Ten Best Presentations” at SNUG Silicon Valley 2023, this presentation discusses the importance of NoCs and their impact on timing analysis and power consumption. It introduces a flow and methodology that utilizes RTL-based estimation of timing and power consumption using RTL Architect in conjunction with Arteris’ FlexNoC 5 and Ncore NoC development frameworks. FlexNoC 5 facilitates up to 5X faster physical convergence of the back-end physical design time and effort.
Presentation
FMEDA Automation for Scalability and Reuse in Complex Systems on Chips (SoCs)
Failure modes, effects, and diagnostic analysis (FMEDA) for sophisticated chips with hundreds of IP blocks are fraught with complexity and opportunities for systematic errors. This presentation will describe an approach that uses a hierarchal and modular library of safety components to describe failure modes, safety mechanism diagnostic coverage, and other functional safety metrics.
Presentation
Is the Missing Safety Ingredient in Automotive AI Traceability?
Presented at The Linley Spring Processor Conference 2022, describes the importance of traceability as it applies to managing SoC requirements and customer deliverables whilst also shortening the path to functional safety certification including ISO 26262.
Podcast
EE Journal: The Freedom to Innovate: Arteris and the Rise of RISC-V
The adoption of RISC-V is spreading. Versatility and “freedom to innovate” are powering the ecosystem. Frank Schirrmeister, VP Solutions and Business Development at Arteris, spoke to EE Journal’s Amelia Dalton on the fish fry podcast.
No results found
Make sure all words are spelled correctly. Try different, more general, or fewer keywords.
Popup Overlay