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HW SW Interface Flow Based on System & Hardware Abstract Models
White Paper

HW / SW Interface Generation Flow Based on Abstract Models of System Applications and Hardware Architectures

This paper presents a code generation flow to deploy system applications over hardware architectures based on abstract descriptions.
Power Dissipation of the Network-on-Chip in a System-on-Chip for MPEG-4 Video Encoding
White Paper

Power Dissipation of the Network-on-Chip in a System-on-Chip for MPEG-4 Video Encoding

An oldie but a goodie: Explains power benefits of NoC technology by characterizing a multi-processor system-on-chip (MPSoC) for MPEG4, AVC/H.264 encoding. Explains NoC power model used to analyze power consumption and dissipation.
Scalability A Looming Problem in Safety Analysis
White Paper

Scalability – A Looming Problem in Safety Analysis

Misbehavior in the electronics can lead to accidents, even fatalities. This paper describes how ISO 26262 standard and in particular the Failure Modes, Effects and Diagnostic Analysis (FMEDA) can be leveraged to address this real concern.
Security in Artificial Intelligence (1)
White Paper

Security in Artificial Intelligence

Unlock insights into AI security challenges & protection strategies. Dive deep into the dual role of AI in cybersecurity.
Boost-SoC-Efficiency-and-Speed-with-FlexGen-Smart-NoC-IP-Automation-White-Paper
White Paper

Boost SoC Efficiency and Speed with FlexGen Smart NoC IP Automation White Paper

This white paper examines the challenges of manual NoC implementation and how smart automation improves NoC performance. Explore how FlexGen’s AI-driven heuristics minimize wire length, refine topology, and reduce latency, making it a transformative technology for AI, HPC, automotive, and other applications.
Making Cache Coherent SoC Design Easier with Ncore
White Paper

Making Cache Coherent SoC Design Easier with Ncore™

As the number and variety of computing elements in SoCs grow, specific application areas require the tight connection of key processing elements through coherency. Ncore Interconnect IP from Arteris makes cache coherent SoC designs easier, saving 100’s of person-years effort per project vs DIY solutions.
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