Arteris Newsroom
Announcements
Press Releases
Stay informed with the latest announcements on Arteris’ key achievements, strategic partnerships, and game-changing innovations.
Arteris Appoints Saurabh Sinha as Chief Financial Officer
Arteris announced the appointment of Saurabh Sinha as Chief Financial Officer, effective September 8, 2026.
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Arteris Deployed by Speedata for Data Center Compute
Arteris network-on-chip IP supports scalable high-performance data movement in Speedata’s purpose-built Analytics Processing Unit for large-scale data analytics workloads.
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Arteris Expands Partnership with Arm to Accelerate Semiconductor Cybersecurity
Arteris hardware security assurance products are being extended across the Arm CPU IP portfolio, building on five years of collaboration.
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Arteris Announces Collaboration with IC-Link by imec to Accelerate Next-Gen AI and HPC Silicon
Arteris collaborates with IC-Link by imec, imec’s design and manufacturing service provider for ASICs and silicon photonics. Arteris NoC IP will be deployed as part of the ongoing effort to accelerate and simplify the development of next-generation AI and high-performance
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Articles
Blogs
Connect with expert insights, emerging trends, and in-depth analysis driving the evolution of the semiconductor industry.
AI-Driven Development: Why Verification Matters More Than Ever
Discover why AI works best as an engineering partner, helping development teams explore solutions faster, while verification ensures reliable results.
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Semiconductor Engineering: How Cache Coherency Simplifies AI Software
This article explains how hardware-managed cache coherency can simplify AI software by coordinating shared data across CPUs, accelerators and chiplets. The article highlights the role of coherent and non-coherent interconnects in building scalable, efficient AI SoCs, while presenting Arteris’ Ncore,
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Navigating ISO 26262 Part 11: A Guide for Semiconductor Architects
Learn how ISO 26262 Part 11 helps semiconductor architects build safer automotive SoCs through architectural planning, automation, and functional safety.
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EDN: Hardware security verification must go beyond functional testing
This article explains why functional testing alone cannot uncover the unintended data paths and hardware–firmware interactions that create security risks, and how Cycuity Radix enables teams to define verifiable security requirements, detect violations and measure security coverage across simulation and
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TechRadar: Data movement is the new performance battleground in semiconductor design
The article highlights why interconnect design must become a first-class architectural consideration, with quality of service, determinism and physically aware automation playing key roles across AI data centers, physical AI and multi-die systems.
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Electronic Design: The Missing Layer in AI Systems Design is Predictable, Scalable Data Movement
The article explores why predictable, scalable data movement is becoming a critical architectural requirement for AI systems as compute complexity and bandwidth demands continue to grow.
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Latest News
In the News
Catch the latest news headlines on Arteris’ advancements, industry-leading impact, and key developments.
Semiconductor Engineering: Chip Security Moves From Checkbox Compliance To Continuous Defense
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Design & Reuse: Arteris: Interview With President And CEO K. Charles Janac About Semiconductor System IP And Network-On-Chip Technology
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Pulse 2.0: Arteris: Interview With President And CEO K. Charles Janac About Semiconductor System IP And Network-On-Chip Technology
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Semiconductor Engineering: Chip Security Moves From Checkbox Compliance To Continuous Defense
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Design & Reuse: Arteris: Interview With President And CEO K. Charles Janac About Semiconductor System IP And Network-On-Chip Technology
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Pulse 2.0: Arteris: Interview With President And CEO K. Charles Janac About Semiconductor System IP And Network-On-Chip Technology
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